Multi-core processors are increasingly used in safety-critical avionics and space systems where resource allocation, isolation, and predictable software execution are essential for system assurance. Traditionally, static allocation of software applications to predefined processor cores has been used to facilitate verification and certification. However, increasing computational demands have created an interest in dynamic resource allocation, where the applications or tasks are reassigned between processor cores during operation.
Dynamic resource allocation can, though, introduce additional challenges related to safety and security by changing how software applications share underlying hardware resources such as caches, memory controllers, and interconnects. Such resource sharing can lead to interference affecting the predictability of software execution, as well as potential security vulnerabilities. Existing guidance on multi-core processors in airborne systems such as AMC 20-193 primarily addresses static allocation of software applications or tasks but also provides scope for justifying limited forms of dynamic allocation (¶2.6.4.2 in AMC 20-193). This raises questions about:
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Which characteristics of static resource allocation contribute to system safety and security in avionics systems?
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How are these characteristics affected by dynamic resource allocation?
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Which mechanisms and methods can be identified or proposed to enable safety and security assurance even when dynamic resource allocation is employed?
The industrial partner Saab Surveillance and Saab Aeronautics has access to a RISC-V-based computing platform that can be used for experimental investigations. The scope and objectives of the experimental part can be defined in consultation with the student(s), supervisors, and the industrial partner.
